Conventionally, as an SiC semiconductor device used as a switching element, a vertical power MOSFET having a trench gate structure in which a gate electrode is formed within a trench through a gate insulating film has been proposed (for example, refer to PTL 1). In the vertical power MOSFET, a gate voltage is applied to a gate electrode formed within a trench through a gate insulating film to form an inversion type channel in a p type base region located on a trench side surface, and a current is allowed to flow between a source electrode and a drain electrode.
The trench gate structure in a vertical power MOSFET configured in this way will be formed as follows. After a p type base region and an n+ type source region have been formed on an n− type drift layer, a trench that penetrates the p type base region and the n+ type source region is formed by etching. As a process of removing a damage in trench etching, after conducting a sacrificial oxidation process of removing a sacrificial oxide film after forming the sacrificial oxide film, a gate oxide film is formed by thermally oxidizing an inner wall surface of the trench. Then, after forming polysilicon on a surface of the gate oxide film in the trench, a gate electrode is formed by patterning. A trench gate structure is formed by the above method.
However, the present inventors have found that when the trench gate structure is formed by the above method, the reliability of the gate oxide film is poor. Specifically, it has been confirmed that a leakage current increases on a trench end.